Release notes Release notes for J-Link ARM DLL V4.20. Version 4.20. Support for Cortex-A5/A8 added. J-Link Configuration Utility added which allows to change USB identification settings.
Support for some new flash devices added. Support for J-Link Ultra added. Flash download / breakpoint support for external CFI flash devices added. Support for serial number programming in Flasher ARM added. All executables are digitally signed. Version 4.14. Instruction set simulation for Cortex-M and Cortex-R4 devices added.
The serial number is NOT stored in the binary firmware file. It gets stored in the EEPROM of the SAM7S64 chip. The newer J-Link DLLs will cause the 'error message' if they see a serial number hasn't been set or if the serial number is one that is known to be used for 'fake' devices.
Cortex-R4 is now fully supported. Performance has been dramatically improved. Support for some new flash devices added. Version 4.12.
Multibank support for Flasher ARM added. J-Trace for Cortex-M3 support for 1-bit and 2-bit trace data format. Support for some new flash devices added. Version 4.10a. Support for Cortex-R4 added.
Support for CFI compliant flash devices added to Flasher ARM. Support for SWO added to J-Trace for Cortex-M3. Support for some new flash devices added. Version 4.08a.
Full support for watchpoints on Cortex-M3. Version 4.06. Breakpoint behaviour during execution can be configured in the J-Link control panel. Version 4.04.
Watchpoint handling for Cortex-M3 cores added. Dialog added to allow setting of break-/watchpoints via the J-Link control panel.
Dialog added to select from a list of emulators connected via TCP/IP. Version 4.02. Flasher ARM support for big endian targets. Version 4.00. Flash programming for Toshiba TMPM330.
Support for J-Link ARM Pro added. Version 3.96a. Flasher ARM supports ASCII protocol for remote communication. Version 3.96. Flasher ARM support for CM3 devices added. Flasher ARM supports init sequence command 'Reset'. Version 3.92.
Support for Flasher ARM added. Support for ARM1156 and ARM1176 added. Version 3.90. Support for some new flash devices added. Support for Analog Devices ADuC7038 added.
Version 3.88. Ability to power down target system on Cortex-M3 cores. Version 3.86. J-Link status window added which shows varios information. Version 3.84. Support for Flasher ARM added. Version 3.82.
Support for serial wire output (SWO) added. Version 3.80. Support for flash download and flash breakpoints for various microcontrollers. Version 3.78a. Support for ARM11 devices added. Support for Cortex-M1 devices added.
Version 3.74e. Support for Atmel AT91CAP9 and AT91SAM9RL64 added. Version 3.72a. Serial wire debug (SWD) support for Cortex-M3 added. Version 3.70a. Support for CP15 access on ARM926EJ-S.
Version 3.68a. Support for accessing the ETB (Embedded Trace Buffer) added. Version 3.60a. Instructions may be emulated if they can not be simulated.
Automatically CPU clock frequency detection also works with J-Link-OC-LPC. Version 3.58a. CPU clock frequency detection also works with adaptive clocking. Version 3.36a. Flash DLL support for some new MCU devices. Version 3.20a.
Support for Cortex M3 devices added. Version 3.10a. Support for J-Link-OC-LPC added. Support for J-Trace added. Version 2.74a.
Support of multiple J-Link on one PC added. Support for multi core debugging added. Version 2.72a. Support for adaptive clocking added. Signal check for TCK, RESET and TRST added.
Supply voltage check added (Warning if supply voltage is to high). Version 2.70a. Flash DLL support for Philips LPC 2xxx series. Version 2.68a. Allows to disable the CPSR check after read. Version 2.66a.
Flash DLL supports Atmel AT91SAM7S 32/64/128/256. Version 2.64a.
Add new function JLINKARMResetNoHalt. Version 2.62a. Support for Atmel SAM-ICE. Version 2.58a. Added API-functions to connect to J-Link via TCP/IP. Version 2.56a.
Caching of flash memory. Version 2.54a. Additional functions for watchpoint handling (JLINKARMSetWP / JLINKARMClrWP). Version 2.52a. Additional functions for breakpoint handling (enable SoftBPs / enable flash cache).
Version 2.46b. DLL has new API function: JLINKARMMeasureSCLen Version 2.46a. DLL has new API function: JLINKARMSimulateInstruction. New USB driver is automatically copied to Driver directory.
Version 2.42a. Support for writing and reading ETM registers. Breakpoint management.
Version 2.40a. Additional functions for RDI (Remote Debug Interface) handling. Version 2.32a.
JTAG instruction and data registers can now be directly accessed Version 2.20b. TDI, TMS can now be controlled individually. JTAG clocks can now be given manually. Status of TAP interface, including target voltage is now available Version 2.14. Support for ARM7-TDMI-S Rev.
3 added and tested with Sharp LH75401 'BlueStreak' Version 4.20. Download speed for Cortex-M3 + JTAG interface has been dramatically improved. Support for Cortex-M4 improved. Memory read / write speed for Cortex-A5/A8/R4 improved. Firmware update for J-Link V8/PRO/Ultra improved.
Version 4.14. Handling of data breakpoints on Cortex-M devices improved. Version 4.10a. Performance of TCP/IP communication on J-Link PRO improved.
Version 4.08a. Log file can be configured via J-Link control panel. Version 4.06. Target interface speed can be changed via the J-Link control panel.
Version 4.04. Performance with Cortex-M3 cores improved.
Version 4.02. Performance with Cortex-M3 cores and SWD improved. Version 4.00. Performance of memory accesses with ARM11 cores. Version 3.96d. SWD performance improved. Version 3.96a.
Performance of memory accesses with Cortex-M3 cores via SWD improved. Version 3.94. Flasher ARM supports adaptive clocking. Version 3.86. New license dialog with real time update added. Version 3.82. WAIT handling on SWD connections added.
Version 3.78a. New reset type (JLINKARMCM3RESETTYPECORE) for Cortex-M3. Disassembly cache added to improve performance. Version 3.74c. Installer can detect any installed IAR EWARM and update the JLinkARM.dll. Version 3.74a.
Using BKPT instruction on ARM9 cores with architecture version 5 to save a watchpoint unit. Allow single stepping on breakpointed instructions. Version 3.70a. New reset strategy for AT91SAM7 MCU's. Version 3.68a.
Performance of trace data capture improved. Version 3.62a. Auto speed recognition also detects adaptive clocking. Reset behavior for reset strategy normal improved. Improved performance on indirect memory reads. Version 3.60a. Better performance on memory write/read with adaptive clocking.
Version 3.58c. Certified J-Link USB driver. Version 3.56e. Auto detection of scan chain configuration changed. Version 3.56e.
Support for J-Link CE. Version 3.56b. Allow higher voltage range up to 3.6 volts for older J-Links. Version 3.56a.
Reset behavior for reset strategy BP@0 improved. Version 3.46a. Reset handling improved. Set speed on J-Link-OC-LPC improved.
Version 3.42a. Improved general performance of J-Link. Version 3.30b. Support for CM3 rev.1 silicon (different Ids).
Version 3.24a. Download speed for ARM9 cores improved. General speed improvements. Instruction set simulation improved. Version 3.20a.
Improved auto speed recognition. Minor improvements. Version 3.14a. Breakpoint handling improved. Minor improvements.
Version 3.12a. Improved breakpoint handling. Version 3.10e. Improved memory access. Improved JTAG handling.
Version 3.10c. New reset strategies added. Improved support for J-Link-OC-LPC. Version 3.10b. Improved reset behaviour. Version 3.10a. Improved reset behaviour.
Version 3.00h. Improved handling of 16-bit and 32-bit read operations. Version 3.00d. Some performance improvements. Version 2.74c.
Memory read and write functions has been improved. Version 2.72d.
Signal check for RESET and TRST removed. Breakpoint handling improved. Version 2.72b. Reset handling improved.
Version 2.72a. Auto speed recognition improved.
DCC communication improved. Some minor improvements. Version 2.70b.
Instruction set simulation improved. Auto speed recognition improved. Version 2.70a. Improved cache handling for ARM9 devices. Performance of DCC communication improved (for J-Link Rev.5).
Version 2.68h. Added command 'SetResetPulseLen' to JLINKARMExecCommand to affect the length of the reset pulse. Version 2.68e. Clear breakpoints and restart CPU in JLINKARMClose. Version 2.68d.
SAM-ICE support for new chips added. Version 2.68b. Cache handling for ARM 9 devices. Version 2.66c. Allow JTAG speeds down to 1 kHz. Version 2.66b.
Support for ARM 926EJ-S devices. Version 2.66a. New J-Link ARM firmware, which allows using J-Link in VMWare. SAM-ICE now operates much faster. Version 2.64b. Minor improvements. Version 2.62c.
Improved error handling. Version 2.60c. Error checking after write turned off by default to avoid unnecessary error messages on some systems. Version 2.60b. Number of available soft BPs increased.
Version 2.58c. Add function for logging. Version 2.58b.
Improved handling of scan chains with multiple devices. Version 2.56a. Support for ARM926EJ-S I- and D-Caches. Version 2.52b. Improved reset handling. Version 2.50b.
Improved scan chain handling with multiple devices. Version 2.50a. Improved breakpoint handling. Version 2.46d. Log file improved.
Version 2.46c. Halting ARM926EJ-S and ARM966E-S improved. Version 2.46b. Halting ARM9 cores improved. Version 2.44a. Breakpoint management improvements. Version 2.30a.
Delay after Reset can now be controlled. JLINKARMSetResetDelay now controls the pause after RESET. Default is 0 ms, which means stopping the core immediately. The length of the RESET pulse is fixed. Version 2.22b. Reset behaviour has been improved.
Version 2.22a. DCC behaviour has been improved. Version 2.22.
RESET behaviour has been improved for STR710. Version 2.20b.
RESET behaviour has been improved. Version 2.14 None. Version 4.20. STR91x commander was not able to handle multiple devices in the JTAG chain. Firmware update did not work properly. Version 4.06b.
DLL may cause a crash on PID change when using with SWD interface. Version 4.06.
Reset with Cortex-M3 cores did not work properly. Version 4.04. Reset with Cortex-M3 cores did not work properly. Flasher ARM did not work properly with TI TMS470 devices. Version 3.96c. SWD communication did not work properly.
Version 3.96b. Flasher ARM handshake control did not work properly. Version 3.96a. Instruction set emulation did not work properly.
Version 3.94. Cortex-M3 with SWD did not work properly.
Version 3.92a. Reset with Cortex-M3 did not work properly. TCP/IP communication did not work properly. Version 3.92. Reset with SWD did not work properly. Version 3.90d.
Reset with SWD did not work properly. Version 3.90c. JLINKARMSPEEDINFO structure was not initialized during flash programming.
Version 3.90. Emulation did not restore target RAM in some cases. Download on TI TMS470 devices did not work properly.
Version 3.86. Read memory via SWD on Cortex-M3 cores performed an extra read access. Version 3.80c. Write register did not work properly on CM3 devices. Version 3.80b. FlashBP and FlashDL license for LPC2xxx devices did not work properly. Version 3.78d.
Read/write memory with slow speed (.